The present invention relates to analog-to-digital conversion and, in particular, to a voltage subtractor circuit suitable for use in a serial-parallel analog-to-digital converter with overlapping operations.
In Assignees' above-mentioned co-pending patent application a serial-parallel A/D converter circuit is described which includes a particular type of high-speed voltage subtractor. The particular type of high-speed voltage subtractor disclosed made use of a precision high-speed operational amplifier and an associated circuit network which included logarithmic impedance means to provide feedback paths for that operational amplifier. Although that circuit configuration offered advantages in terms of simplicity of over-all circuit structure, the design requirements of a precision high-speed operational amplifier are often difficult to attain, particularly in a monolithic integrated circuit embodiment.